The present invention relates to a method and system for manufacturing a wafer having a fine circuit pattern such as a semiconductor device, or liquid crystal. More particularly, the invention relates to a technique of inspecting a pattern of a semiconductor device or a photomask, and to an inspecting method and system using a charged particle beam, for inspecting a defect in an arbitrary part on an unfinished semiconductor wafer in a semiconductor device fabricating process.
A semiconductor device is manufactured by, for example, repeating a step of transferring a pattern formed with a photomask on a semiconductor wafer by a lithography process and an etching process. In a manufacturing step of a semiconductor device, whether the lithography process, etching process, and the like are successfully performed or not exerts a large influence on the yield of the semiconductor device. It is consequently important to detect occurrence of an abnormal state or a failure at an early stage or before it occurs. Particularly, to improve the yield, it is important to measure electric resistance and electric capacitance of a contact hole and an interconnection in a partially finished semiconductor wafer at an early stage of the manufacturing process. There are the following conventional techniques of performing inspections to detect an electrical defect.
One of the techniques is a nano-probe device JP-A No. H8-160109) for measuring electric resistance by making a sharpened tungsten (W) needle (with the tip having a radius of curvature of about 0.1 xcexcm) come into direct contact with a measurement portion. As patterns become finer in recent years, however, the size of a portion to be measured becomes about the same or smaller than that of the W needle, so that the measurement is becoming very difficult. As means for dealing with the problem, it can be considered to reduce the radius of curvature of the tip of the W needle. In this case, however, the tip becomes very soft and is consequently deformed when it comes into contact with the portion to be measured. The method is not a realistic one. Another problem is contact resistance. When the needle and the portion to be measured are made of different materials, especially, one of them is made of a semiconductor, a Schottky junction occurs, and electric resistance depending on a voltage occurs in the portion. Consequently, accurate measurement cannot be performed.
Another conventional technique uses a SEM (Scanning Electron Microscope) and is disclosed in JP-A No. H5-258703, JP-A No. H11-121561, and JP-A No. H6-326165.
According to the technique disclosed in JP-A No.H5-258703, an image to be inspected is compared with an adjacent image, and a portion having different potential contrast (brightness) is determined as a defect, thereby detecting a defect. The technique, however, does not have means for obtaining and displaying electric characteristics (electric resistance and electric capacitance) and, therefore, cannot determine whether the portion is critical or not.
According to the technique disclosed in JP-A No. H11-121561, the degree of emission of secondary electrons is controlled by a control electrode positioned on a wafer, the surface of the wafer is charged positively or negatively, and a normal portion, a low-resistance defective portion, and a high-resistance defective portion are determined from a voltage contrast image obtained at this time.
Control of the emission of secondary electrons by the control electrode is disclosed in JP-A No. S59-155941. For example, in a voltage contrast image obtained in the case where the control electrode is adjusted to be positively charged, a low-resistance defective portion (for example, low resistance of few hundreds xcexa9) is light, a high-resistance defective portion (electric resistance: ∞) is dark, and a normal portion is light but is darker than the low-resistance defective portion since the normal portion has resistance higher than the low-resistance defective portion. From the lightness/darkness of the image, the resistance can be determined to be high or low, but an absolute value cannot be calculated. By measuring a leak current, electric resistance can be calculated. However, it takes time for the inspection and the electric resistance cannot be measured at high speed.
According to the technique disclosed in JP-A No. H6-326165, an interconnection on a substrate is irradiated with electron beams, a dielectric current is generated between the substrate and the ground by charges generated by the irradiation, and a change with time is measured. Although the electric capacitance can be measured to be large or small, an absolute value cannot be measured.
In an inspection using such a voltage contrast image of the SEM, in some cases, a difference in potential contrast between the normal portion and the defective portion is small depending on the structure of a wafer, and it is difficult to detect a defect. For example, in the case where a circuit has a pn junction, when the pn junction is reverse-biased by charges which are generated in association with irradiation of electron beams, the portion becomes high-resistant. Due to this, it is difficult to discriminate the portion from a high-resistant portion with faulty electrical continuity.
As described above, since the nano-probe device has a problem such that a portion to be measured is smaller than the tip of the needle and a problem of the contact resistance between the needle and a sample, accurate electric resistance cannot be measured depending on a sample. It takes very long time to inspect the whole face of a wafer and is substantially impossible to conduct the inspection. Although an apparatus using the SEM can determine whether the electric resistance is high or low and whether the electric capacitance is large or small from a voltage contrast image but cannot estimate an absolute value. Although a resistance value can be calculated by measuring a leak current, it takes time for an inspection, the inspection cannot be conducted at high speed, and it takes very long time to inspect the whole face of a wafer. Further, depending on the structure of a wafer (for example, when a pn junction is formed), it is difficult to discriminate a normal portion from a defective portion in a voltage contrast image.
An object of the invention is to provide an inspection method and system for automatically calculating values of electric resistance and electric capacitance and obtaining distributions and tendencies of electric resistance and electric capacitance of the surface of a substrate such as a wafer in short time only by acquiring a voltage contrast image. Another object is to provide appropriate inspection parameters corresponding to the structure of a wafer.
The inventors of the present invention have found that the objects can be achieved by using the fact that a charged particle beam image (voltage contrast image) obtained by irradiating a sample with a charged particle beam depends on electric resistance and electric capacitance between the irradiation region and the ground and irradiation time.
The mechanism will be described by referring to FIG. 2. Electrons are used as an example of particles applied. It is assumed that an incident energy EPE is about 500 eV where emission efficiency "sgr" of the sum of secondary electrons and back scattered electrons is larger than 1. Usually, an electron having energy equal to or smaller than 50 eV is called a secondary electron and an electron having energy larger than 50 eV is called a back scattering electron. When an insulator 60 is irradiated with an electron beam, an electron beam irradiated region 61 is charged positively (a case where it is charged at 4V is shown as an example), and a potential barrier of Us [eV] is formed on the surface.
Consequently, as shown by an energy ESE distribution of the sum NSE of the number of secondary electrons and back scattered electrons of FIG. 3, the secondary electrons and back scattered electrons having energy lower than Us are not emitted. Even when the secondary electrons and back scattered electrons are emitted, they are returned to the insulator side. When the number of electrons returned is N1, the number of emitted electrons is N2, and the ratio of the secondary electrons and back scattered electrons which are not returned but are emitted is "sgr"SE, "sgr"SE=N2/(N1+N2). A substantial emission efficiency "sgr"eff is expressed as "sgr"eff="sgr"SExc3x97"sgr". With the irradiation of electron beams, the charging voltage increases and the ratio of returned secondary electrons and back scattered electrons becomes higher. Consequently, "sgr"eff gradually decreases and, finally, stability is achieved with a charging voltage at which "sgr"eff is 1.
On the other hand, in the case of a conductor having sufficiently low electric resistance, electrons can be supplied. The charging is therefore lessened, and a and "sgr"eff are almost equal to each other. The insulator looks dark and the conductor looks light.
An example by which the inventors of the present invention have found that electric resistance can be measured by using the above fact will now be described. A sample used is a wafer as shown in FIG. 4 in which an SiO2 film 402 is formed on a silicon (Si) 407 and contact holes 401 in each of which a tungsten (W) plug 400 (having a diameter of 0.25 xcexcm) is buried are opened. Each plug has electric resistance due to a residue 403 of SiO2 (402) on the bottom of the plug. Reference numeral 404 shows a high-resistant open defect having the residue 403, and 405 denotes a low-resistant short defect in which plugs are connected.
An equivalent circuit shown in FIG. 5 including an electric resistor R and an electric capacitor C of an electron carrying path was used. From the shape of the plug, the electric capacitance C was set to 10xe2x88x9217 F (farad). Electron irradiation parameters in FIG. 23 were used. 10 keV was set as the initial energy of an electron beam 19 emitted from an electron gun 10, an earth voltage was applied to a retarding electrode 63, and a retarding voltage of xe2x88x929.5 kV was applied to a wafer 9 to be inspected. Consequently, the incident energy EPE of the electron beam to the wafer was 500 eV.
As a result, it was found that the sum NSE of the number of secondary electrons and back scattered electrons to be detected changes with time as shown in FIG. 6. The vertical axis denotes the value obtained by dividing NES to be detected by electron beam current IP [A], and the horizontal axis indicates the product of electron beam irradiation time Te (or time required for a scan electron beam to cross the plug) and IP. It was also found that the relation between NSE which was stabilized after elapse of sufficient time and the electric resistance R is as shown in FIG. 7. The vertical axis indicates NSE/IP and the horizontal axis indicates the product of R and IP. In order to calculate the electric resistance R, a change in NSE is necessary.
From the above, the inventors of the present invention have found for the first time that the parameter of the current IP of the electron beam to calculate the electric resistance R is 0 less than log(Rxc2x7IP)  less than 3. Although the graph of FIG. 7 depends on the shapes of material and sample, the change amount is very small. By changing the retarding voltage VR or charging (voltage VB) the peripheral region of a plug by applying an electron beam before inspection, the NSE can be changed as shown in FIGS. 8 and 9, so that high-sensitive inspection parameters exist. In order to confirm the calculation prediction, each of plugs was irradiated with an electron beam and the number of secondary electrons and back scattered electrons from the plug were detected.
After that, the electric resistance of each plug was measured by a nano-prober. Since the uppermost layer of the plug is made of W, the contact resistance with the W needle of the nano-prober is sufficiently low. FIG. 10 shows the dependency on the electric resistance R of the NSE obtained as a result. The vertical axis indicates the quotient of the NSE and the beam current IP, and the horizontal axis denotes the product between the electric resistance R and the beam current Ip. In the graph, a solid line shows calculation and circles indicate experiment. It was found that the calculation and the experiment coincides with each other. That is, it was found that the resistance value can be calculated from the voltage contrast image by calculating the dependency on resistance of the sum of the number of secondary electrons and back scattered electrons.
It was also found that the electric capacitance can be also measured by using the semiconductor wafer. This will be described hereinbelow. The beam current IP was set to 100 nA. A plug having resistance 1012xc2x7(ohm) or higher recognized by the nano-probe method was used. By comparing the result of calculation of a change in NSE to be detected which is obtained by changing irradiation time of the electron beam (or time required for the electron beam to cross the plug) with the calculation result, the electric capacitance was estimated from the comparison result. As shown in FIG. 11 of the experiment result and the calculation result, the change with time of the NSE when the electric capacitance was set to 10xe2x88x9217 F (farad) in the calculation result reproduces the experiment result almost faithfully. The value is almost equal to the value calculated from the shape of the plug or the like.
Further, a method of providing appropriate inspection parameters adapted to the structure of a wafer will now be described. FIG. 8 shows that the NSE changes by changing the retarding voltage VR. In this case, the charging voltage US(V) in an electron beam irradiation region also varies as shown in FIG. 24. The phenomenon is used for the inspection. For example, when a circuit pattern having a pn junction is irradiated with an electron beam and the pn junction is charged so as to be reverse-biased, the junction has high resistance, and it is consequently difficult to discriminate the junction from a defect of faulty electrical continuity. However, by changing the retarding voltage to increase the charging voltage and to cause a breakdown in the pn junction, the resistance value can be reduced. Since the difference between the resistance value in the normal portion and the resistance value in the defective portion becomes large and the normal portion and the defective portion become different from each other in a voltage contrast image, the inspection can be conducted in such a state.
In the case where the pn junction itself has a defect and the resistance value in the reverse bias direction is small, the retarding voltage is adjusted to a charging state where a breakdown is caused only in the defective pn junction. The difference between the resistance value in the normal portion and the resistance value in the defective portion is increased, and a difference occurs between the normal and defective portions, so that the inspection can be conducted. Although the retarding voltage is used here, also by changing other electron irradiation parameters such as electron beam current, incident energy of the electron beam to a sample, irradiation time, and the number of irradiation times, similar effects can be produced.
It was found that, by the methods as described above, the electric resistance and electric capacitance can be estimated and the appropriate defect detecting parameters adapted to the structure of a wafer can be provided. Although the electron beam was used in the examples, the similar effects can be produced by using other charged particle beams such as positive ions and negative ions.
In an actual inspection system, the electric resistance and electric capacitance are determined automatically as follows.
First, a semiconductor wafer is scanned with a charged particle beam once or a plurality of times. Scan time may be changed. Secondary electrons and back scattered electrons generated are detected by a detector, a signal proportional to the number of electrons detected is generated, and an inspection image corresponding to the scan is formed on the basis of the signal.
Subsequently, by a computer such as a work station or personal computer, in consideration of the current value of the charged particle beam, irradiation energy, scan time, the number of scanning times, electric field on the surface of the semiconductor wafer, emission efficiency of the secondary electrons and back scattered electrons, and the like, an image is formed by using the electric resistance and electric capacitance as parameters. The electric resistance and electric capacitance are determined so that the image coincides with the inspection image.
In the inspection, by changing the current value of the charged particle beam, the measurement range of the electric resistance can be changed. As a process before acquiring an image, the charged particle beam of a predetermined quantity is preliminarily applied or the retarding voltage is applied to the semiconductor wafer, thereby enabling measurement sensitivity to be changed.
Appropriate inspection parameters adapted to the structure of a wafer can be also provided.